AiP74AVC1T45

The AiP74AVC16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs.The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn and nBn) each with its own output enable (n ) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8V and 3.6V making the device suitable for low voltage translation between any of the following voltages:0.8V,1.2V,1.5V,1.8V,2.5V and 3.3V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on n causes the outputs to assume a high-impedance OFF-stateThe device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

The AiP74AVC16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs.The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn and nBn) each with its own output enable (n ) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8V and 3.6V making the device suitable for low voltage translation between any of the following voltages:0.8V,1.2V,1.5V,1.8V,2.5V and 3.3V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on n causes the outputs to assume a high-impedance OFF-stateThe device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

The AiP74AVC16245 is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions.

AiP74AVC1T45は、双方向レベル変換を可能にする3ステート出力を備えたシングルビット、デュアル電源トランシーバです。このデバイスは、あらゆる低電圧ノード（0.8V、1.2V、1.5V、1.8V、2.5V、3.3V）間のレベル変換に適しています。

The AiP74AVC2T45 is a dual-bit, dual-supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual-supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In Suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.

The AiP74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input(DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA.The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state.The AiP74AVCH2T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

The AiP74AVC4T245 is an 4-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features four 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), a output enable input (n ) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins nAn, n and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (n ) can be used to disable the outputs so the buses are effectively isolated.The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

The AiP74AVCH4T245 is a 4-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features two 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), a output enable input (n ) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins nAn, n and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (n ) can be used to disable the outputs so the buses are effectively isolated.The AiP74AVCH4T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

The AiP74AVC4T774 is a 4-bit, dual supply transceiver that enables bidirectional level translation. It features eight 1-bit input-output ports (An and Bn), four direction control inputs (DIR1, DIR2, DIR3 and DIR4), an output enable input ( ) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins An,  and DIRn are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIRn allows transmission from An to Bn and a LOW on DIRn allows transmission from Bn to An. The output enable input ( ) can be used to disable the outputs so the buses are effectively isolated.The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn are in the high-impedance OFF-state.

The AiP74AVC8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), a output enable input ( ) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V,1.2V,1.5V,1.8V,2.5V and 3.3V).Pins An, and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input ( ) can be used to disable the outputs so the buses are effectively isolated.The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn are in the high-impedance OFF-state.

The AiP74AVCH8T245 is a 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), a output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated. The AiP74AVCH8T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.